Superconducting computers could extend Moore’s Law beyond the limits of complementary metal oxide semiconductors (CMOS) by cutting power requirements 100-fold—down to kilowatts for exascale supercomputers, compared to the megawatts required today.
Superconducting computers take advantage of the absolutely zero resistance of some metals—usually niobium—when supercooled near absolute zero. Superconductivity was discovered in 1911 by Dutch physicist and Nobel Laureate Heike Kamerlingh Onnes, but it was not until 1954 that the first practical application of superconductivity—the cryotron, basically a switch the operates using superconductivity—was developed by Dudley Allen Buck, an electrical engineer working in the Massachusetts Institute of Technology’s Lincoln Laboratory. As an alternative to CMOS, the cryotron is orders of magnitude faster and consumes far less power, but the requirement of cryogenic temperatures (−150°C/−238°F) in order to enable superconductivity long relegated its development to the back burner.
Experts agree the U.S. is currently leading in superconducting computer research today, but the Japanese have made great strides in developing superconducting computers, and the Chinese recently announced a $145-million five-year catch-up effort to fabricate their own superconducting computers by 2022.
However, said Scott Holmes, a superconductor expert at McLean, VA-based technology consulting firm Booz Allen Hamilton, “Characteristics of the Chinese process are somewhat behind the state of the art.”
Marc Manheimer, Cryogenic Computing Complexity (C3) program manager for the U.S. Intelligence Advanced Research Project Agency (IARPA), observed that China is “not as advanced in the design or fabrication of superconducting computers” as the U.S. “However, it did not take long for their achievements in room temperature computers to catch up with us, so we need to work hard to stay ahead.”
China’s greatest achievement in the field to date is the creation of a superconducting chip bearing 10,000 Josephson junctions (devices consisting of two or more superconductors coupled by a weak link, which can be used a single-electron transistors). The U.S., in comparison, has created chips bearing more than 70,000 Josephson junctions.
Even the Russians report they plan to begin building the components of superconducting computers for the generation of computers that will come after CMOS hits the Moore’s Law wall, concluding that “new controllable devices could eventually change the face of superconductor technology, making it the universal platform for future high-performance computers.”
To keep the U.S. ahead in this race, IARPA began funding superconducting computers as a long-term solution to the power-cooling problem of supercomputers, according to Manheimer. Holmes agrees, as “superconductor technology seems most applicable to large-scale computing.”
However, during the four-year development effort at C3 ending this year, IARPA has lowered its expectations somewhat from steadfastly predicting that superconducting computers would supplant CMOS.
“Our original justification for developing superconducting computers was the immense amount of power consumed by the Top500 supercomputers,” said Manheimer. “We still believe that the expense of cryogenics is going to restrict superconducting computers to at least the scale of datacenters, but they could end up as accelerators to the digital computers already there.”
Cryogenics make superconducting chips equipped with Josephson junctions 1,000 times more expensive to cool than CMOS, but they are 100,000 times more energy efficient in operation, yielding an 100-fold increase in overall energy efficiency. In addition, superconducting computers aim also to boost operating capabilities by cranking clock speed as much as 150 times—from today’s 5GHz limit for CMOS, to a superconductor’s 770GHz ceiling. The potential of the C3 program prompted IARPA to start two new superconducting programs—one to advance superconductor electronic design automation (EDA) called SuperTools, and a separate superconductor-to-digital computer interface effort called SuperCable.
The prime contractors for the more mature C3 effort—IBM, Northrop Grumman, and Raytheon—will demonstrate their logic and memory building-block chips for future U.S. superconducting computers later this year, with SuperTools and SuperCable shooting for new EDA tools and new interfaces, respectively, circa 2020.
However, like CMOS before it, superconducting computers still have many hurdles to overcome. For instance, superconducting chips are much larger than standard chips, because scaling down their feature sizes is six decades behind CMOS, which packs billions of transistor junctions onto a single chip; in contrasts, superconducting chips’ larger feature sizes restrict them to less than 100,000 junctions per chip.
These efforts are not without their critics.
Said Mikhail Dorojevets, a Google Scholar and professor at Stony Brook University, where superconducting computer research has taken place for the last two decades, “It is very misleading to quote the 770GHz speed of one flip-flop as the major reason for building a superconducting computer, or to make conclusions about the current complexity of the superconductor circuits from the fact that someone was able to place thousands of serially connected junctions on a single chip. Those are neither representative speeds nor representative circuits.”
So far, the only commercial superconducting computer operating today comes from Canada’s D-Wave Systems Inc., whose chips feature many superconducting computer circuits, but which are primarily aimed at harnessing etherial quantum states to perform their calculations. Nevertheless, D-Wave has grappled successfully with the same superconducting computer design challenges facing C3, SuperTools, and SuperCable. For instance, D-Wave has fabricated the smallest superconductor chip feature sizes today (240 nanometers, fabricated by D-Wave’s foundry, SkyWater Technology); has successfully adapted existing EDA tools to superconductors as SuperTools aims to do with Synopsys’ EDA tools, and has solved the problem of interfacing superconducting circuitry with CMOS (albeit, at a smaller scale than is SuperCable’s goal). D-Wave’s task has been simpler all around, since it is concentrating on a single type of computation—quantum optimization—rather than the IARPA goal of mimicking all the functions of the classical von Neumann computers in use today.
D-Wave senior vice president of systems Jeremy Hilton said the company is leveraging “powerful superconducting computer logic in the fabric of our quantum processors to enable a scalable architecture, but D-Wave does not develop classical von Neumann processors. However, we recognize the tremendous potential that could be harnessed for products in this space, with D-Wave having blazed a path in superconductor IC fabrication.” Hilton added that D-Wave “will move towards more universal machines as the application opportunities become clear and motivate the technology.”
Said Lance Cooley, director of the Applied Superconductivity Center at Florida State University, “Superconducting processor research goes back to 1970s, but you don’t build something unless you have to, and CMOS operating at room temperature was much easier to develop first. However, now that Moore’s Law for CMOS is ending, the necessary cryogenics is becoming worth the billion-dollar investment needed to develop superconducting computers.”
The U.S. is still leading the way, according to Cooley, due to the many successful developments made by institutions like the National Institute of Standards and Technology (NIST). “Key investigators from NIST have kept the U.S. ahead in superconductivity research,” said Cooley.
NIST is also assisting IARPA, using its expertise to independently evaluate the logic and memory circuits to be delivered later this year by C3, after their fabrication this year in the niobium foundry at MIT’s Lincoln Laboratory. As noted by Cooley, NIST has vast experience with superconducting materials—in fact, in its main charter to set standards, it now defines one volt with an array of 20,208 superconducting Josephson junctions in series (fabricated in its own niobium foundry).
After final fabrication by year’s end, NIST will test and evaluate both IBM’s and Northrup Grumman’s prototype superconducting computer chips next year, after which IARPA will decide whether to provide further funding to one (or possibly both) toward the goal of producing a complete 64-bit core capable of accelerating, or possibly supplanting, CMOS-based computers.
R. Colin Johnson is a Kyoto Prize Fellow who has worked as a technology journalist for two decades.
ACM News October 30, 2018