InductEx v5.06 Released

An update for InductEx has been released on 28 March 2019. The latest version is 5.06. Download at www.inductex.info.

Version 5.06 adds the largest collection of new features we have ever crammed into a single update to our multi-terminal SCE IC inductance extraction tools. The main new features are:

• Capacitance extraction has been extended to include multiple dielectric layers and vias, and it now works on larger structures than before.

• Package modelling capabilities, with highly customizable wire bonds to create chip-and-carrier models for inductance and mutual coupling extraction.

• Back-annotation to SPICE simulation decks and circuit-level compact SPICE model extraction from the EM environment.

• Permeable material support, so that ferromagnetic structures can be analysed.

• The calculation of characteristic impedance and phase velocity is now possible for transmission line structures.

Other enhancements were made to improve the tool functionality, such as strengthened expression evaluation in the IXI input file that allows more powerful geometric sweeps. The GDS file read-in has also been improved to allow read-in of structures that are not in sequential order, as well as extraction from cells below the “top level”, so that it is now possible to select a sub-cell in a large chip layout for extraction.

We have also improved the user experience of InductEx. Several bugs were fixed, especially related to LDF mistypes, positive mask isolation layers, polygon processing, and circuit netlists with parallel or series inductors. We also fixed the Gmsh format to remove compatibility issues with TetraHenry and replaced the linear equation solver with a more rugged implementation (thanks to Paul le Roux).

The User Manual has been revised extensively, with more detailed examples now included in the text and on the InductEx website.

Coenrad Fourie and Kyle Jackman
InductEx team