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December 31, 1969
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1
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16-Bit Wave-Pipelined Sparse-Tree RSFQ_Adder.pdf
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January 28, 2018
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648.63KB
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2
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20GHz 8x8bit parallel carry_save RSFQ multiplier.pdf
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September 2, 2017
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576.79KB
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3
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ERSFQ 8-bit Parallel Arithmetic Logic Unit.pdf
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March 3, 2019
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636.77KB
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4
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FFT_Processor_2017.pdf
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August 11, 2017
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664.35KB
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5
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Reversibility and energy dissipation in adiabatic superconductor logic.pdf
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January 11, 2018
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2.84MB
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6
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Signal_Transmission_between_AQFP_and_SFQ_circuits.pdf
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August 31, 2017
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726.65KB
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7
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Superconducting Magnetic Field Programmable Gate Array .pdf
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February 17, 2018
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7.02MB
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8
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Synthesis flow for AQFP circuits.pdf
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August 31, 2017
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611.50KB
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9
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Towards_32bit_energy_efficient_RQL_processors_2015.pdf
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August 22, 2017
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413.31KB
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10
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Wave_pipelining for RSFQ processors .pdf
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September 2, 2017
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149.13KB
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11
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Current recycling for SFQ TDCs.pdf
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August 31, 2017
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1.19MB
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12
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100GHz_SFQ bit-serial_adder.pdf
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November 9, 2017
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774.25KB
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13
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ERSFQ Circuit for Parallel Multibit Data Transmission.pdf
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September 9, 2017
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2.94MB
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14
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Energy-Efficient Single-Flux-Quantum Based Neuromorphic Computing.pdf
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February 6, 2018
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1.13MB
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15
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A Case for Superconducting Accelerators.pdf
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February 22, 2019
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3.48MB
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16
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Review_Fujimaki_ISEC_2017.pdf
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August 11, 2017
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2.83MB
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